User Guide🔗
Introduction🔗
The PAN9019A M.2 device (ENWF9511CMKF) is ideally suited for use of the module in conjunction with host processor evaluation kits that have a M.2 Key E socket.
Features🔗
- M.2 Key E form factor
- External antenna MHF® 4 connector
- IO Expander (PCAL6408ABS)
- PCM interface for voice applications
Block Diagram🔗
Board Overview🔗
1
The module
2
Mounting screw indentation
You can use the mounting screw indentation to secure the board in a M.2 Key E socket. Also see Mounting the Device
3
MHF 4 connector ANT1
You can use the MHF 4 connector to connect an external antenna. Also see Attaching the Antenna
4
Status indicator LEDs
The status indicator LEDs for indicating the Wi-Fi and Bluetooth status are currently non-operational.
5
M.2 Key E connector
You can insert the M.2 device into a M.2 Key E socket to connect the modules interfaces to a host processor. Also see M.2 Connector Pin Map
6
Power LED
You can observe the power LED to verify that the device is correctly powered.
7
IO Expander
You can use the PCAL6408ABS IO expander to access a couple of special function pins of the PAN9019A from the host processor. Also see IO Expander
Device Dimensions🔗
Initial Preparations🔗
Attaching the Antenna🔗
A Taoglas® FXP830.54.0100C is provided with the PAN9019A M.2 device.
The FXP830.54.0100C is a combination of a Taoglas FXP830 flex PCB antenna and a 100 mm long cable with a MHF 4L plug.
To attach the antenna to the PAN9019A M.2 device execute the following instructions.
-
Place the PAN9019A M.2 device on a flat surface.
-
Position the MHF 4L plug of the antenna over the MHF 4 connector ANT1 3 of the PAN9019A M.2 device.
-
Press the MHF 4L plug onto the ANT1 connector with light downward pressure.
Antenna options
Please refer to the PAN9019A Product Specification for a list of antenna options.
Mounting the Device🔗
The following requirements must be met:
- You have attached the provided antenna to the PAN9019A as described in Attaching the Antenna.
To mount the PAN9019A M.2 device in a M.2 Key E socket on a host board execute the following instructions.
-
Line up the notch on the M.2 Key E connector 5 with the key of the M.2 Key E socket of the host board.
-
Insert the PAN9019A M.2 device into the socket slightly angled.
-
Apply some light downward pressure until the PAN9019A M.2 device is parallel to the host board and makes contact to the threaded insert.
-
Insert a M2.5 x 4 machine screw into the mounting screw indentation 2 and the threaded insert.
The PAN9019A M.2 device is secured in place.
M.2 Connector Pin Map🔗
Signal directions
Please note the following table describes the signals from the viewpoint of the host processor.
UART RTS/CTS flow control pins
The following table assumes the UART RTS signal always to be an output and the UART CTS singal to be an input.
Please note that some host processors use a legacy UART mechanism that configures the CTS signal as output for slave (DCE) operation but as input for master operation (DTE).
The RTS signal is configured as output in master mode and input in slave mode.
Description | M.2 Key E Pin | Function | Module Footprint | Module Pin |
---|---|---|---|---|
SDIO Interface | 9 | SDIO CLK | D1 | SD_CLK |
11 | SDIO CMD | D2 | SD_CMD | |
13 | SDIO DATA0 | E1 | SD_DAT0 | |
15 | SDIO DATA1 | F2 | SD_DAT1 | |
17 | SDIO DATA2 | F1 | SD_DAT2 | |
19 | SDIO DATA3 | G1 | SD_DAT3 | |
UART Interface | 22 | UART RXD | A3 | UART_TX |
32 | UART TXD | A2 | UART_RX | |
36 | UART RTS | B1 | UART_CTS | |
34 | UART CTS | B2 | UART_RTS | |
PCM Interface | 8 | PCM CLK | A6 | PCM_CLK |
10 | PCM SYNC | B6 | PCM_SYNC | |
12 | PCM DIN | B5 | PCM_DOUT | |
14 | PCM DOUT | A4 | PCM_DIN | |
SPI Interface | 38 | SPI MISO | D9 | SPI_TX |
40 | SPI MOSI | C9 | SPI_RX | |
42 | SPI Clock | E9 | SPI_CLK | |
62 | SPI Interrupt | E3 | SPI_INT | |
64 | SPI Chip Select | C10 | SPI_FRM | |
IO Expander | 58 | I2C Data | N/A | N/A |
60 | I2C Clock | N/A | N/A | |
Reset Signals | 23 | Independent Wi-Fi Reset | A8 | IND_RST_WL |
54 | Independent Bluetooth Reset | B8 | IND_RST_BT | |
56 | Wi-Fi Disable | H8 | PDn | |
IO Expander P1 | Independent 802.15.4 Reset | D3 | IND_RST_15.4 | |
IO Expander P4 | Independent Software Reset Indicator | E10 | RST_IND | |
Wake Signals | 20 | Bluetooth Wake Out | B7 | BT_WAKE_OUT |
21 | Wi-Fi Wake Out | F9 | WL_WAKE_OUT | |
IO Expander P3 | Bluetooth Wake In | A7 | BT_WAKE_IN | |
IO Expander P2 | Wi-Fi Wake In | G8 | WL_WAKE_IN | |
Coexistence Interface |
44 | not connected | N/A | N/A |
46 | not connected | N/A | N/A | |
48 | not connected | N/A | N/A | |
Power | 2, 4, 72, 74 | 3.3 V | C11, D11 | 3V3 |
1, 7, 18, 33, 39, 45, 51, 57, 63, 69, 75 |
GND | A1, A5, A9, A11, B3, B9, B10, B11 C1, D10, E2, E11 G2, G5, G9, G10 G11, H1, H4, H7 H9, H11, TP1, TP2 |
GND, TP_GND |
|
Status LEDs | 6 | LED 1 | B4 | GPIO3 / PCM_MCLK |
16 | LED 2 | C3 | GPIO0 / XOSC_EN |
IO Expander🔗
The PAN9019A M.2 device features a NXP PCAL6408ABS IO Expander 7.
You can access a couple of special function pins of the PAN9019A that are otherwise not available on M.2 Key E connector 5.
IO Expander Pin | Function |
---|---|
P1 | Independent 802.15.4 Reset |
P2 | Wi-Fi Wake In |
P3 | Bluetooth Wake In |
P4 | Independent Software Reset Indicator |
P0, P5 - P7 | unused |
The PCAL6408ABS is supported by the gpio-pca953x
mainline driver.
Set CONFIG_GPIO_PCA953X
in your kernel configuration to either y
or m
to include the driver.
Further, add the following subnode to the I2C master controller node of your device tree that is connected to the I2C interface of the M.2 socket on your host board.
The I2C address of the PCAL6408ABS is configured to 0x20
.
&i2cX
[...]
m2_expander: pcal6408@20 {
compatible = "nxp,pcal6408";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "UNUSED", "IND_RST_15.4", "WL_WAKE_IN",
"BT_WAKE_IN", "RST_IND", "UNUSED", "UNUSED", "UNUSED";
};
};
The gpio-line-names
property is optional and allows naming the individual IOs of the PCAL6408ABS.
Device tree bindings
Please refer to the Linux kernel documentation for a full description of the device tree bindings for the gpio-pca953x
driver.
You can check that the IO Expander 7 is working properly by executing the gpioinfo
command.
The driver creates a new gpiochip that groups the available 8 IOs of the PCAL6408ABS.
$ gpioinfo
[...]
gpiochipX - 8 lines:
line 0: "UNUSED" unused input active-high
line 1: "IND_RST_15.4" unused input active-high
line 2: "WL_WAKE_IN" unused input active-high
line 3: "BT_WAKE_IN" unused input active-high
line 4: "RST_IND" unused input active-high
line 5: "UNUSED" unused input active-high
line 6: "UNUSED" unused input active-high
line 7: "UNUSED" unused input active-high
Hardware Modifications🔗
You can modify the PAN9019A M.2 device to suit your application and your specific host processor by making some hardware modifications.
SDIO Reference Voltage🔗
In case your host processor board only supports a SDIO signal voltage of 3.3 V you can reconfigure the PAN9019A M.2 device to use the 3.3 V generated by the PMIC as VIOSD.
The PAN9019A supports 1-bit or 4-bit SDIO transfer modes with full clock range up to 208 MHz. The SDIO Interface pins are powered from the VIOSD voltage supply with either 1.8 V or 3.3 V.
To set VIOSD to 3.3 V execute the following instructions.
-
Unsolder the resistor R10.
-
Place a 0 Ohm resistor (0402) for R8 or bridge it with a solder blob.
This connects VIOSD to 3.3 V.
Note
SDIO clock speeds higher than 50 MHz can only be achieved with a SDIO signal voltage level (VIOSD) of 1.8 V and a host processor that supports the SDIO 3.0 Standard.
The maximum achievable data rate is limited by the used SDIO clock speed.
For further information please refer to the module product specification at
IO Reference Voltage🔗
In case your host processor board supports only IO voltage levels of 3.3 V you can reconfigure the PAN9019A M.2 device to use 3.3 V as voltage level for its UART and IOs.
The voltage used by the IOs and the UART interface is determined by the voltage applied to VIO. You can configure it to either 1.8 V or 3.3 V.
BT_WAKE_OUT and IND_RST_BT operating voltage
Please note that the signals BT_WAKE_OUT (module output, M.2 Key E pin 20) and IND_RST_BT (module input, M.2 Key E pin 54) are always operated with 3.3 V.
The following hardware modifications do not affect these signals.
To set VIO to 3.3 V execute the following instructions.
-
Unsolder R6.
-
Place a 0 Ohm resistor (0402) for R4 or bridge it with a solder blob.
This connects VIO to 3.3 V.