User Guide🔗

Introduction🔗

The PAN9019 M.2 device (ENWF9501CMKF) is ideally suited for use of the module in conjunction with host processor evaluation kits that have a M.2 Key E socket.

Features🔗

M.2 Key E form factor
External antenna MHF® 4 connector
Coexistence interface
PCM interface for voice applications

Block Diagram🔗

Board Overview🔗

1 The module

2 Mounting screw indentation
You can use the mounting screw indentation to secure the board in a M.2 Key E socket. Also see Mounting the Device

3 MHF 4 connector ANT1
You can use the MHF 4 connector to connect an external antenna. Also see Attaching the Antenna

4 Status indicator LEDs
The status indicator LEDs for indicating the Wi-Fi and Bluetooth status are currently non-operational.

5 M.2 Key E connector
You can insert the M.2 device into a M.2 Key E socket to connect the modules interfaces to a host processor. Also see M.2 Connector Pin Map

6 Power LED
You can observe the power LED to verify that the device is correctly powered.

Device Dimensions🔗

Initial Preparations🔗

Attaching the Antenna🔗

A Taoglas® FXP830.54.0100C is provided with the PAN9019 M.2 device.
The FXP830.54.0100C is a combination of a Taoglas FXP830 flex PCB antenna and a 100 mm long cable with a MHF 4L plug.

To attach the antenna to the PAN9019 M.2 device execute the following instructions.

Place the PAN9019 M.2 device on a flat surface.
Position the MHF 4L plug of the antenna over the MHF 4 connector ANT1 3 of the PAN9019 M.2 device.
Press the MHF 4L plug onto the ANT1 connector with light downward pressure.

Antenna options

Please refer to the PAN9019 Product Specification for a list of antenna options.

Mounting the Device🔗

The following requirements must be met:

You have attached the provided antenna to the PAN9019 as described in Attaching the Antenna.

To mount the PAN9019 M.2 device in a M.2 Key E socket on a host board execute the following instructions.

Line up the notch on the M.2 Key E connector 5 with the key of the M.2 Key E socket of the host board.
Insert the PAN9019 M.2 device into the socket slightly angled.
Apply some light downward pressure until the PAN9019 M.2 device is parallel to the host board and makes contact to the threaded insert.
Insert a M2.5 x 4 machine screw into the mounting screw indentation 2 and the threaded insert.

The PAN9019 M.2 device is secured in place.

M.2 Connector Pin Map🔗

Signal directions

Please note the following table describes the signals from the viewpoint of the host processor.

UART RTS/CTS flow control pins

The following table assumes the UART RTS signal always to be an output and the UART CTS singal to be an input.

Please note that some host processors use a legacy UART mechanism that configures the CTS signal as output for slave (DCE) operation but as input for master operation (DTE).

The RTS signal is configured as output in master mode and input in slave mode.

Description	M.2 Key E Pin	Function	Module Footprint	Module Pin
SDIO Interface	9	SDIO CLK	D1	SD_CLK
	11	SDIO CMD	D2	SD_CMD
	13	SDIO DATA0	E1	SD_DAT0
	15	SDIO DATA1	F2	SD_DAT1
	17	SDIO DATA2	F1	SD_DAT2
	19	SDIO DATA3	G1	SD_DAT3
UART Interface	22	UART RXD	A3	UART_TX
	32	UART TXD	A2	UART_RX
	36	UART RTS	B1	UART_CTS
	34	UART CTS	B2	UART_RTS
Reset Signals	23	Independent Wi-Fi Reset	A8	IND_RST_WL
	54	Independent Bluetooth Reset	B8	IND_RST_BT
	56	Wi-Fi Disable	H8	PDn
Wake Signals	20	Bluetooth Wake Out	B7	BT_WAKE_OUT
	21	Wi-Fi Wake Out	F9	WL_WAKE_OUT
	40	Bluetooth Wake In	A7	BT_WAKE_IN
	42	Wi-Fi Wake In	G8	WL_WAKE_IN
Coexistence Interface	44	PTA Priority	D9	EXT_PRI
	46	PTA Request	C10	EXT_REQ
	48	PTA Grant	C9	EXT_GNT
PCM Interface	8	PCM CLK	A6	PCM_CLK
	10	PCM SYNC	B6	PCM_SYNC
	12	PCM DIN	B5	PCM_DOUT
	14	PCM DOUT	A4	PCM_DIN
Power	2, 4, 72, 74	3.3 V	C11, D11	3V3
Power	1, 7, 18, 33, 39, 45, 51, 57, 63, 69, 75	GND	A1, A5, A9, A11, B3, B9, B10, B11 C1, D10, E2, E11 G2, G5, G9, G10 G11, H1, H4, H7 H9, H11, TP1, TP2	GND, TP_GND
Status LEDs	6	LED 1	B4	GPIO3 / PCM_MCLK
Status LEDs	16	LED 2	C3	GPIO0 / XOSC_EN

Hardware Modifications🔗

You can modify the PAN9019 M.2 device to suit your application and your specific host processor by making some hardware modifications.

SDIO Reference Voltage🔗

In case your host processor board only supports a SDIO signal voltage of 3.3 V you can reconfigure the PAN9019 M.2 device to use the 3.3 V generated by the PMIC as V_IOSD.

The PAN9019 supports 1-bit or 4-bit SDIO transfer modes with full clock range up to 208 MHz. The SDIO Interface pins are powered from the V_IOSD voltage supply with either 1.8 V or 3.3 V.

To set V_IOSD to 3.3 V execute the following instructions.

Unsolder the resistor R10.
Place a 0 Ohm resistor (0402) for R8 or bridge it with a solder blob.

This connects V_IOSD to 3.3 V.

Note

SDIO clock speeds higher than 50 MHz can only be achieved with a SDIO signal voltage level (V_IOSD) of 1.8 V and a host processor that supports the SDIO 3.0 Standard.

The maximum achievable data rate is limited by the used SDIO clock speed.

For further information please refer to the module product specification at

IO Reference Voltage🔗

In case your host processor board supports only IO voltage levels of 3.3 V you can reconfigure the PAN9019 M.2 device to use 3.3 V as voltage level for its UART and IOs.

The voltage used by the IOs and the UART interface is determined by the voltage applied to V_IO. You can configure it to either 1.8 V or 3.3 V.

BT_WAKE_OUT and IND_RST_BT operating voltage

Please note that the signals BT_WAKE_OUT (module output, M.2 Key E pin 20) and IND_RST_BT (module input, M.2 Key E pin 54) are always operated with 3.3 V.

The following hardware modifications do not affect these signals.

To set V_IO to 3.3 V execute the following instructions.

Unsolder R6.
Place a 0 Ohm resistor (0402) for R4 or bridge it with a solder blob.

This connects V_IO to 3.3 V.